1. Comparison of third-generation semiconductor materials

SiC crystal is a third-generation semiconductor material, which has great advantages in low-power, miniaturization, high-voltage and high-frequency application scenarios. The third-generation semiconductor materials are represented by silicon carbide and gallium nitride. Compared with the previous two generations of semiconductor materials, the biggest advantage is its wide band-free width, which ensures that it can penetrate higher electric field strength and is suitable for preparing high-voltage and high-frequency power devices.

2. Specification for 6inch 4H-N sic wafers .(2inch,3inch 4inch ,8inch sic wafer also is avaiable)

Grade		Zero MPD Production Grade (Z Grade)	Standard Production Grade (P Grade)	Dummy Grade (D Grade)
Diameter		99.5 mm~100.0 mm
Thickness	4H-N	350 μm±20 μm	350 μm±25 μm
	4H-SI	500 μm±20 μm	500 μm±25 μm
Wafer Orientation		Off axis: 4.0°toward <1120 > ±0.5°for 4H-N, On axis: <0001>±0.5°for 4H-SI
Micropipe Density	4H-N	≤0.5cm-2	≤2 cm-2	≤15 cm-2
	4H-SI	≤1cm-2	≤5 cm-2	≤15 cm-2
※ Resistivity	4H-N	0.015~0.025 Ω·cm		0.015~0.028 Ω·cm
	4H-SI	≥1E9 Ω·cm		≥1E5 Ω·cm
Primary Flat Orientation		{10-10} ±5.0°
Primary Flat Length		32.5 mm±2.0 mm
Secondary Flat Length		18.0 mm±2.0 mm
Secondary Flat Orientation		Silicon face up: 90°CW. from Prime flat ±5.0°
Edge Exclusion		3 mm
LTV/TTV/Bow /Warp		≤3 μm/≤5 μm/≤15 μm/≤30 μm		≤10 μm/≤15 μm/≤25 μm/≤40 μm
※ Roughness		Polish Ra≤1 nm
		CMP Ra≤0.2 nm		Ra≤0.5 nm
Edge Cracks By High Intensity Light		None		Cumulative length ≤ 10 mm, single length≤2 mm
Hex Plates By High Intensity Light		Cumulative area ≤0.05%		Cumulative area ≤0.1%
Polytype Areas By High Intensity Light		None		Cumulative area≤3%
Visual Carbon Inclusions		Cumulative area ≤0.05%		Cumulative area ≤3%
Silicon Surface Scratches By High Intensity Light		None		Cumulative len`gth≤1×wafer diameter
Edge Chips High By Intensity Light		None permitted ≥0.2 mm width and depth		5 allowed, ≤1 mm each
Silicon Surface Contamination By High Intensity		None
Packaging		Multi-wafer Cassette or Single Wafer Container

2. Industrial chain

The silicon carbide SiC industrial chain is divided into substrate material preparation, epitaxial layer growth, device manufacturing and downstream applications. Silicon carbide monocrystals are usually prepared by physical vapor transmission (PVT method), and then epitaxial sheets are generated by chemical vapor deposition (CVD method) on the substrate, and the relevant devices are finally made. In the industrial chain of SiC devices, due to the difficulty of substrate manufacturing technology, the value of the industrial chain is mainly concentrated in the upstream substrate link.